开源EDA工具
数字仿真工具iverilog、verilator、GTKWave
数字电路逻辑综合工具YoSys
数字芯片布局布线工具Qrouter
开源集成平台OpenROAD
FPGA EDA工具Verilog to Routing (VTR)
芯华章EpicSim
北京大学开源EDA OPEN BELT
EDA创新中心OpenEDA
果壳
其他
数字仿真工具iverilog、verilator、GTKWave
Icarus Verilog(iVerilog)
GitHub – steveicarus/iverilog: Icarus Verilog
Veripool
GitHub – verilator/verilator: Verilator open-source SystemVerilog simulator and lint system
Verilator: Verilator 是一个高性能 Verilog HDL 模拟器与 lint 系统
gtkwave download | SourceForge.net
数字电路逻辑综合工具YoSys
yosys: yosys(gitee)
Yosys Open SYnthesis Suite :: About(已经没了)
数字芯片布局布线工具Qrouter
Qrouter
GitHub – leviathanch/qrouter(qrouter1.3)
开源集成平台OpenROAD
OpenROAD – Foundations and Realization of Open and Accessible Design
FPGA EDA工具Verilog to Routing (VTR)
Welcome to Verilog-to-Routing’s documentation! — Verilog-to-Routing 8.1.0-dev documentation
芯华章EpicSim
EDAGit
EpicSim: EpicSim Project
芯华章科技股份有限公司/EpicFV
北京大学开源EDA OPEN BELT
GitHub – pku-dasys/cocoon: An infrastructure for integrated EDA
Getting started – EDA Wiki
EDA创新中心OpenEDA
OpenEDA社区
OpenEDI: 通过OpenEDI开源数据基础构件…
果壳
GitHub – OSCPU/NutShell: RISC-V SoC designed by students in UCAS
Magic VLSI
Magic VLSI
Magic Home Page
IRSIM
Ngspice
Ngspice, the open source Spice circuit simulator – Intro
ngspice – Browse /ng-spice-rework at SourceForge.net
其他
KLayout Layout Viewer And Editor
SymbiFlow – the GCC of FPGAs
Home :: OpenCores
OpenRISC – OpenRISC
openrisc · GitHub
RISC-V International
VSDOpen Conference 2019 (Online) – Semiwiki
相关链接:
北京华大九天软件有限公司 | 华大九天 | EDA
国微集团(深圳)有限公司
芯华章 X-EPIC:打造自主研发的EDA技术
上海安路信息科技有限公司
EDA的发展新趋势:AI是关键!
DARPA推EDA新项目,欲变革行业
国内开源EDA学术研讨会召开
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